FSBL

FSBL (First stage bootloader) built using Vitis v2019.2 after successfully generating the bitstream for above design and exporting as hardware xsa file in the platform. This provides a golden design along with FSBL, which can be booted via writing to QSPI Flash Memory

Build

Using Vitis GUI

Steps to build:

  1. Export the design as xsa file for later developments in Vitis

  2. Add platform project name and location

  3. Modify BSP Settings and enable xilffs

  4. Add application project and select ZYNQ_FSBL

  5. Go to Next

  6. Check the sources initialised on left side

  7. Run Build

More details refer this

Command line

Require: Vitis 2019.2

  1. SetUp Environment

$ source /tools/Xilinx/Vitis/2019.2/settings64.sh

  1. Enable Xilinx Software Command Line Tool

$ xsct%

  1. Setup workspace

$ setws </path/to/a/directory>

  1. Export xsa file and setup platform project

$ platform create -name <platform/name eg:spec7_custom>  -hw </<path to xsa>/spec7_custom.xsa> -no-boot-bsp

  1. Check the active platform:

$ platform active

  1. Create domain

$ domain create -name "fsbl_domain" -os standalone -proc ps7_cortexa9_0

  1. Check the active domain with:

$ domain active

  1. Add library before building FSBL:

$ bsp setlib xilffs

  1. Check stdin and stdout configuration in the BSP:

$ bsp config stdin ps7_uart_1
$ bsp config stdout ps7_uart_1

  1. Build the platform:

$ platform generate

  1. Add system project

First, we create the application for the FSBL targeting the already existing platform and the specific domain and specifying the template Zynq FSBL. In addition, we will select the spec7_custom_system as the name of the system that will be created to host the application:

$ app create -name zynq_fsbl -template {Zynq  FSBL} -platform spec7_custom -domain fsbl_domain -sysproj spec7_custom_system

  1. Config and Build FSBL:

    $ app config -name zynq_fsbl build-config release

$ app config -name zynq_fsbl build-config

$ app build -name zynq_fsbl

This will generate zynq_fsbl.elf file in workspace directory set using step 2 as <path/to/directory_ws/zynq_fsbl/Release/zynq_fsbl.elf>.

Tcl script

All the above steps can be automated using Tcl script and built with make.

Source: In spec7 ohwr repo sw/fsbl/, run

$ make

This will generate zynq_fsbl.elf in /output directory.